S.Sindhu, V.Geetha and Dr.G.Murugesan
The Discrete Wavelet Transform (DWT) is one of the powerful signal processing tools. It has been effectively used in wide range of applications including image processing, speech analysis, pattern recognition and biometrics. Large amount of memory is required for storing the intermediate values for the implementation of Two Dimensional Discrete Wavelet Transform. Transposition Memory (TM) requirement is the major concern for the Two Dimensional 5/3 mode and 9/7 mode Lifting Based Discrete Wavelet Transform (LDWT). Interlaced Read Scan algorithm is proposed to achieve a Memory Efficient hardware Architecture for 2-D Dual Mode Lifting Based Discrete Wavelet transform, that reduces the TM. For Hardware Simplicity, Multiplier-less architecture is proposed which is applicable for both lossy and lossless coding.